Ternary content-addressable memory

VHDL-2008 / TCAM

TCAM IP cores for FPGA designs

A standalone RAM-based TCAM core for masked lookup in FPGA designs. Inspect its architecture and matching behavior, then request a technical demo.

The ternary alphabet[ 0 · 1 · X ]
Exact zeroExact oneDon't care
Conceptual lines connecting three ternary states to a set of matching results
One key. A set of matches.TCAM / IP
Every bit has a role. Some don't care.

Understand the category. Explore the logic. Discuss the fit.

01 /The fundamentals

Category concept

A third state. A different way to search.

0
Requires a zero at this position.
1
Requires a one at this position.
X
Accepts either binary value.

A TCAM stores rules made of 0, 1, and X. A binary search key matches a row when every non-X bit agrees with the corresponding key bit. X means “don't care.”

Rules can overlap, so more than one row can match the same key. The matching rules form a set; choosing a winner is a separate system decision.

That makes TCAM a useful category to explore for masked rule matching. How the logic maps into hardware depends on the implementation.

Latency is time to a result.

The delay between presenting a search key and receiving its result. It may be expressed in time or clock cycles.

Throughput is a rate.

The number of lookups processed per unit of time. A design's latency and throughput describe different dimensions.

02 /Interactive lookup

Functional illustration / 8-bit

Functional lookup model.

Toggle a key bit between 0 and 1. Cycle each rule bit through 0, 1, and X. Every row result and the match vector update as you edit.

Search & rule planeBit order: 7 → 0, left to right
An eight-bit search key and five ternary rule rows. Bit 7 is leftmost; bit 0 is rightmost. Each row reports 1 for a match or 0 for no match.
Bit index76543210Result

Scroll this matrix to see every bit and result.

Equal bitDon't careDifferent bit

An illustrative example of ternary matching logic. This is not a hardware simulator, Microcores RTL, or a performance benchmark. It makes no claim about hardware cycles or physical layout.

Include example in inquiry

03 /Engineering fit

Your constraints come first

Bring your constraints. Ask better questions.

A useful fit discussion begins with your application, not a generic number. These six areas help frame the engineering questions for a TCAM design.

01

Key width & rule count

How many bits are in each key, and how many ternary rules does your application need?

02

Rule update pattern

Is the table largely static, updated in batches, or changed frequently while searches continue?

03

Clock, latency & throughput

Describe the target clock, acceptable result delay, and required search rate separately.

04

Multiple-match handling

Will your system consume every matching row, detect overlaps, or apply its own selection policy?

05

Target FPGA & part

Share the intended family, part, and speed grade, if known. Device support needs confirmation.

06

Toolchain & integration

Which tool and version are you using? What interface, clocking, reset, and update requirements matter?

Possible TCAM applications

  • Packet classification
  • Access-control rules
  • Masked pattern matching

General TCAM use cases, not a statement of supported Microcores configurations. Discuss your application's fit with an engineer.

04 /The evaluation conversation

Start with your design.

Evaluate this TCAM IP core against your FPGA, table geometry and integration requirements.

Ask about architectural fit, available evaluation material, and the specifications relevant to your project. Compatibility, performance, delivery, and licensing need direct confirmation.

Request Demo
01 /

Share the application & constraints

02 /

Discuss the engineering questions

03 /

Clarify an appropriate evaluation

05 /Questions, answered

A few useful clarifications.

Start here, then bring the specifics of your design to the conversation.

Does this example represent Microcores hardware?

No. It is an interactive illustration of the ternary matching rule. It does not represent Microcores RTL, hardware timing, resource use, or a released configuration.

What happens when several rules match?

Every matching row is marked in the example's match vector. No row is chosen as a winner. In a system design, consuming the full set or resolving it to a selection is a separate architectural decision.

Which FPGA devices and tools can I use?

Share your target FPGA family, part, and tool version. Confirm device, tool, and interface compatibility directly during the engineering discussion; this website does not establish support for a particular platform.

How should I compare latency and throughput?

Latency measures the delay to a result; throughput measures the lookup rate. Evaluate both against your application's needs and the conditions of a specific implementation. This page provides no hardware performance figures.

What if my requirements are still taking shape?

Start with your name, work email, and company. Everything else in the inquiry is optional. Include what you know, use “not sure yet” where helpful, and describe the question you want to explore.

06 /Let's talk TCAM

An inquiry, prepared by you

Your next design starts with a conversation.

Tell us a little about your project. Request Demo prepares a visible email draft that you can review, copy, or open in your email app. You choose when to send it.

Your draft is addressed tocontact@microcores.net

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Describe latency and throughput separately, if you can.

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